As a typical solid state image pickup device, there are apparatuses called as a CCD sensor constituted by a photodiode and a CCD shift register, and a CMOS sensor such as an active pixel sensor (APS) constituted by a photodiode and a MOS transistor, and the like.
The APS includes a photodiode, a MOS switch, an amplifier circuit for amplifying a signal from the photodiode and the like within a pixel. Further, the APS has a lot of advantages such that an XY addressing can be executed and a sensor and a signal processing circuit can be formed as one chip. However, on the other hand, since a number of devices within one pixel is large, a pixel aperture ratio is small. Further, it is hard to reduce a chip size which determines a magnitude of an optical system, and the CCD accounts for a large percentage of a market.
In recent years, the CMOS sensor draws the attention on the basis of an improvement of a micro forming technique of the MOS transistor and an increase of requests for making the sensor and the signal processing circuit by one chip and making an electric power consumption low.
FIG. 5 shows an example of an equivalent circuit of the APS (for example, Japanese Patent Application Laid-Open No. H11-274454 (corresponding to EP Laid-Open Publication No. 948056A2)).
Reference numeral 501 denotes a power source line, reference numeral 502 denotes a reset switch line selecting a reset transistor, reference numeral 503 denotes a select switch line selecting a select transistor, reference numeral 504 denotes a signal output line, reference numeral 505 denotes a photodiode serving as a photoelectric conversion portion, reference numeral 506 denotes a transfer switch line for selecting a transfer transistor, reference symbol Q1 denotes a transfer transistor, reference symbol Q2 denotes a reset transistor, reference symbol Q3 denotes a transistor for amplifying, and reference symbol Q4 denotes a select transistor. The photoelectric conversion portion corresponds to an embedded type photodiode used in a CMOS, CCD or the like. The embedded type photodiode is structured such that a region having a high impurity density (for example, a p-type semiconductor region) is provided in a surface. Accordingly, it is possible to restrict a dark current generated in an SiO2 surface, a junction capacitance can be provided between a storage unit (for example, an n-type semiconductor region) and the p-type semiconductor region in the surface, and it is possible to increase a saturation charge amount of the photodiode.
A light signal charge Qsig stored in the photoelectric conversion portion 505 is read in a floating diffusion area via the element Q1. The element Q2 resets an electric potential of the floating diffusion area.
The charge is voltage converted into a signal charge Qsig/CFD on the basis of a capacity CFD of the floating diffusion area, and the signal is read through the element Q3. The element Q4 is a select switch for selecting a line.
As mentioned above, a plurality of MOS transistors are provided within the pixel. As a classification of the MOS transistor structure, there is a classification obtained by a region in which a channel is formed. This is classified into a surface channel type MOS transistor in which a channel portion is formed near a substrate surface, and a buried channel type MOS transistor in which the channel portion is formed at a deep position of the substrate apart from the surface. It is often the case that the surface channel type MOS transistor is normally used as the MOS transistor within the pixel, however, there is a solid state image pickup device using the buried channel type MOS transistor as the reset transistor and the transfer transistor (for example, refer to Japanese Patent Application Laid-Open No. 2001-309243 (U.S. Patent Publication No. 2001-013899))
Further, there has been a problem that a noise component is included in an output voltage due to a 1/f noise generated in the transistor Q3 in a source follower portion. Accordingly, in the CCD, there has been proposed a method of forming the source follower portion in the final stage by a buried channel type pMOS transistor (for example, U.S. Pat. No. 5,438,211).
However, in the case that the surface channel type MOS transistor and the buried channel type MOS transistor of the same conductive type are arranged within the same substrate, a process becomes complicated and a cost increase is caused.
Further, not being limited to the solid state image pickup device, in the case that the surface channel type MOS transistor and the buried channel type MOS transistor of the same conductive type are both provided within the chip, there has been a problem that a manufacturing process thereof becomes complicated.
Accordingly, an object of the present invention is to form a semiconductor apparatus having a surface channel type MOS transistor and a buried channel type MOS transistor of the same conductive type on the same substrate in accordance with a simple process. Further, an object of the present invention is to provide a semiconductor apparatus having a reduced noise and a manufacturing method thereof on the basis of a simple structure.